1. Field of the Invention
The invention relates in general to semiconductor devices, and more particularly to integrated circuit power distribution systems and methods.
2. Description of the Related Art
A semiconductor device, such as a semiconductor memory device, typically comprises a memory array, input/output (I/O) circuits, word drive circuits, bit select circuits, sense amplifiers, sense amplifier drive circuits, and other analog and digital circuits. All of these circuits receive power from a power distribution system in the integrated circuit.
Data stored in the memory array is typically read by selecting a memory cell and using a sense amplifier to compare a resulting voltage or current to a reference voltage or current. Typically, the I/O circuits and word drive circuits are optimized for speed and may change states rapidly. The rapid change of states often generates current transients or voltage transients in the power distribution system of the semiconductor device. These resulting transients may cause performance degradation in particular circuits, such as the bit select circuits, sense amplifiers, sense amplifier drive circuits, or other sensitive analog or digital circuits.
Typically, the power distribution system comprises a pair of busses, with one bus at a higher potential than the other bus. Depending on the architecture of the bus pair, the conductance of the busses may vary, which may also cause performance degradation in circuits powered by the bus pair.